Did you know that processors, and other packaged integrated circuits, often contain more than one die (aka chip)? It’s not something you can tell by looking at them. Credit: VPVHunter Did you know that processors, and other packaged integrated circuits, often contain more than one die (aka chip)? It’s not something you can tell by looking at them. They look the same, but the insides are changing. Names such as “multi-chip modules” (MCM), “system in package” (SIP), “3D stacking,” and “flip chips” have been used to describe this trend of packing multiple dies in a package. It’s becoming common now. What’s inside that package? Gordon Moore famously observed that the number of transistors in integrated circuits would grow at a rate that approximately doubled every two years. Those integrated circuits were realized on single pieces of silicon (called a die or chip). Each die was put into a package (which is what is actually connected to the circuit board). If Moore had simply observed that packages would be able to hold twice as many transistors every two years, no one would be predicting the end of Moore’s Law. My point: Our ability to see continued high growth in transistor counts inside a package now matters more for the long-term future of computing than whether more transistors fit on a single die. Multi-chips past, present, and future Past multi-chip packages: One example of an early multi-chip package that shipped in high volume was the Intel Pentium Pro processor, which powered the world’s first TeraFLOP/s computer in 1996. The processor package contained a processor die and a separate die that held the L2 cache. The dies were connected to each other using very thin gold wires. Prior systems had L2 caches outside the package (and some contemporary processors designs still had L1 caches outside the package). Pentium Pro package opened, 200MHz processor die (left) with 256KB L2 cache die (right) Wikipedia: Moshen, Pentiumpro moshen, CC BY-SA 2.5 Present multi-chip packages: Multi-chip packages are common today, and a wide variety of technology underlies them. Die-stacking technology, which is exactly what it sounds like, has been used to connect memory chips together in various designs. Other technology places individual dies close to each other, on top of a layer that connects them. The Intel Xeon Phi processors are made up of nine or 10 dies: one for the processor die, eight for the MCDRAM, and some versions have a network interface controller die, too. Announcements this year include AMD’s EPYC processors, which are made up of four dies designed to be connected together to form the final product; Intel’s inclusion of both memory die(s) and an AMD GPU die with its processor die in an Intel processor package; and NVidia’s P100 packages that contain 16 memory dies in addition to the GPU die. Stacking and interposer connections (six die example) artwork: James Reinders Future multi-chip packages: Surely we’re only seeing the beginning of a trend, and there will be plenty of innovation yet to come. NVidia presented a paper this year on how to construct a GPU with multiple dies. The DARPA CHIPS project notably envisions the ability to connect dies from a wide variety of vendors, as well as dies made on radically different materials (including connecting silicon dies with gallium arsenide dies). Pros and cons of multi-die packaging If the number of transistors in your design won’t fit on a single die, then multi-chip is necessary. Here’s a chart I created to summarize the pros and cons: Dies are not all made the same. The densest memory designs are made with significantly different recipes than dies for processors (which is a significant reason why processors might be coupled with memory dies on package instead of trying to put all the design on a single die). And dies made on silicon versus those made on gallium arsenide have different recipes. Packaging Moore’s Law Would it hurt us to give Gordon Moore a break for being so focused on a die instead of the package? Offering him this benefit of the doubt would allow us to extend Moore’s Law far into the future. Never mind my musings about this; the technology is real and helps make the future of computing very bright indeed. That’s a big deal for us all. Resources NVidia – MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability AMD – Hot Chips 2017: AMD Outlines Threadripper And EPYC’s MCM Advantage, Claims 41% Cost Reduction Intel + AMD – Intel, AMD Moves Rattle GPU Market DARPA – Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) Download your free copy of Intel® Parallel Studio XE here Technology Industry