IDF moves: Does Intel have the guts?

Intel has the power to create the strongest x86 server market yet seen. Does it have the nerve?

Sure, Xscale and Itanium show at IDF, and both of these architectures deserve more attention than the media or Intel gives them, but let there be no question: IDF is about x86. Not just any x86, but Intel’s. And at this fall’s show, it’s not just about Intel’s x86, but Intel’s 2008 x86. Intel sees ’08 as an election year, and September’s IDF is about rallying the electorate around its agenda.

To press the political analogy a bit further, Intel sees itself as a candidate running unopposed. Intel wants the 2008 Intel/AMD election reduced to a pro forma exercise. IT always welcomes one less thing to worry about, so there are quarters where Intel’s true message, “the obvious choice,” resonates.

Smart people in IT, however, are genuinely weighing their options. Interoperability across the leading architectures has reached new heights, including Solaris and AIX on RISC; Windows and HP-UX on Itanium; and OS X, Windows, Solaris, and Linux on x86. Middleware and distributed architectures are transparently bridging platform gaps so that the best matches can be made case-by-case. The only obvious choice is to limit the careers of “deciders” who, when given dynamic objectives to meet, cling to their technology selection without due consideration.

At present, the best fit for dynamic objectives is Quad-Core Opteron, AMD’s brand new chip for servers with two to eight sockets. Intel’s tacit acceptance of AMD’s superior design can be seen in the reactive engineering and positioning invested in 7300 series Xeon MP, Intel’s quad-core CPU for four socket servers. Intel’s quad-core Xeon was loaded with promise but delivered less than expected.

Intel’s Dedicated High Speed Interconnect was to be the point-to-point bus between processors that would beat AMD’s Direct Connect Hypertransport intra-processor bus. Instead, Intel hooks Xeon MP 7300 processors together the way it always has, indirectly, through the north bridge chip, the same chip that handles all memory and I/O traffic for the system. Intel’s Snoop Filter, a 64 megabyte lookup table into which all processor busses feed, is Intel’s stopgap for the absence of Level 2 cache coherency that AMD has built into Direct Connect.

Xeon MP has no answer for Quad-Core Opteron’s Level 3 cache — just a larger, shared, Level 2 cache that’s external to the CPU cores. Intel promoted that it would combine four cores onto a single die (one contiguous surface) for Xeon MP, as AMD does for Quad-Core Opteron. But in the end, Xeon MP 7300 stuck with Core 2’s design of separate pieces linked together by lengthy, complex buses that are shared by multiple processors and that often serve multiple functions. I can’t envision how sixteen Xeon MP 7300 cores would work efficiently with the touted 256GB of RAM, given that all cores and sockets have to share an off-chip memory and I/O controller.

Intel missed its targets, then had Marketing scramble to paint bull’s-eyes where each wayward arrow fell. The list of promises not delivered, or half-delivered, with Xeon MP 7300 raises reasonable doubts about how Intel’s grander plans for 2008 will actually pan out. Intel has simple strategies for next year: Co-opt AMD’s on-chip memory and bus controller; do genuine point-to-point CPU and subsystem interconnects as AMD has done; put multiple cores on one contiguous wafer; and bring Hyper Threading back into the picture. Let’s call it an Opteranium. If Intel actually pulled this off, 2008 would be a banner year for x86 on all fronts, with two chipmakers putting forth their greatest advances to date.

A changed game is inevitable for Intel in 2008. What’s in question is whether Intel will play a role in changing it. Intel has had high-speed I/O bus work underway for years — it just hasn’t found its way into Intel’s mainstream designs. There’s been no point in trying. To make a high-speed bus worth using, the bus controller would have to be on the CPU. 2008 is supposed to be the year that happens, and when you pull the memory controller onto the CPU as well, you’ve got something that might scale.

One unique technology that Intel might bring to the game is Hyper Threading (HT). Intel bailed on this accelerated context-switching technology after one try, and Intel advised against HT’s use in servers because of the potential for decreased performance. We now know that threads are good, and the monolithic server applications that might have suffered under Hyper Threading are rare. Sun’s Niagara processors, UltraSparc T-1 and T-2, are monstrously multithreaded single-socket server chips, and T-2 takes home floating-point benchmark trophies at just 1.7 GHz. Even Java loves threads, and I’m impatient for Hyper Threading’s return.

If Intel does one-up its rival next year, it will be a welcome turn of the tables. The fire would be lit under AMD for a change, and we’d discover what AMD is capable of when tasked to the limits of its capabilities. Better still, if Intel actually had something on AMD, perhaps it would start marketing along the lines of “look what we’ve got that they haven’t got,” and IT would start looking at those seemingly minute details that add up to more virtual machines per CPU, higher total server throughput, and lower full-system power consumption. These are advantages that AMD owns but that too few recognize because of an aversion to detail.

If Intel wants to change the game in 2008, it can start by burying the buzzwords, bringing out the facts, and fighting the fight in engineering instead of marketing. When technology swings decisions, chipmakers are driven to their highest potential. Buyers will pay more for that, so there’s no need to let competition devolve into a price war. Have Marketing sit out; let the engineers play. That’s how to change the game in 2008.