Amid speculation that its next-generation processor architecture would bring chips with as many as 16 cores, Intel unveiled a much more modest roadmap at the annual Fall Intel Developer Forum conference in San Francisco today. Speakers at the conference confirmed that we can expect dual-core 64-bit processors across all of Intel’s platform targets in 2006 — including mobile, desktops, and servers — based on a new, converged design that draws upon ideas from all of Intel’s products, from the Pentium M to Itanium.Following a presentation about the company’s mobile initiatives, Intel chip designer David “Dadi” Perlmutter, the father of the Pentium M, took the stage to explain the inner workings of the new architecture. The new chips, he said, would feature a longer, deeper execution pipeline than the original Pentium M design, dubbed “Banias,” but not as long as that seen in the NetBurst architecture used for current Pentium 4 designs. The chips will include advanced power management capabilities, Perlmutter said, based on increase usage of “normally-off transistors,” which don’t draw power until they’re actually in use by the processor.The new designs will also incorporate an advanced caching subsystem that will enable the chips to make better use of scarce cache resources. As with current dual-core designs, the two cores in each next-gen CPU will share the same cache space, but the new architecture will allow them to do so more efficiently, Perlmutter said. Also, the chips will be able to dynamically allocate cache space to each core as needed. The exact amount of cache on each chip die will likely depend on whether the processor is intended for mobile, destkop, or server usage.Finally, Perlmutter said the new chips will reduce memory access latency, using memory prefetching and other techniques that will help to bring more data to the processing units more quickly. — By Neil McAllister Technology Industry